| http://www.w3.org/ns/prov#value | - This information includes designation of the destination S or A register and designation of whether the reference is SCMRD or SCMWR. When the register 370 is loaded, its valid bit is set and, the next A clock cycle the contents are transferred to register 371 if the valid bit in that register indicates that it is not holding resource scheduling data for a prior scalar memory reference.
|
